AVIC2018 Information

Link to next year’s AVIC http://www.avic2019.org/   Yilan, Taiwan

Final Program is updated (28 Oct 2018) with presentation times and session chair information Here

New updates(Sep 12)!:  information for authors  and Hotel booking information in Venue&Accommodation menu

Early-bird registration deadline extended to 23 September 2018

Updated detailed program is uploaded!!. Presenter instruction will be provided soon. 

Keynote and Invited talks information 

The Research Committee on Electronic Circuits of the Institute of Electrical Engineers of Japan (IEEJ) in cooperation with the Department of Electrical Engineering, Faculty of Engineering, Chiang Mai University will hold the 2018 International Conference on Analog VLSI Circuits (AVIC) in Chiang Mai, Thailand, during 31 October – 2 November 2018.

AVIC is the successor of International Analog VLSI Workshop, which had been held for more than 18 years. It has contributed to long-standing worldwide community of analog VLSI circuit experts in industry and academia. The AVIC is organized with the purpose to be a place for a group of analog VLSI specialists from both industry and academia worldwide to meet, discuss, and exchange ideas and recent research results on analog VLSI circuits and their applications. The topics include, but are not limited to,

Analog building blocks

  • Amplifiers, Filters,
  • Comparators, Multipliers, PLL,
  • Voltage/Current References,

Mixed-signal IC

  • A/D and D/A Converters
  • High speed IO interface
  • Sample-and-Hold Circuits

RF and Microwave Circuits

Energy harvesting, Power management

Analog CAD and Design Automation

  • Simulators, Layout Techniques
Optical circuits, Silicon Photonics

Digital circuits, DSP

Signal and Information Processing
Applications

  • Communication, Multimedia
  • Automotive Electronics
  • Biomedical Electronics
  • Consumer Electronics
  • Space Electronics
  • Non-linear Signal Processing
  • Sensing and Sensor Networks,

The works do not have to be complete, e.g. results from a test chip are not mandatory. Authors are requested to send a paper written in English up to 4 pages together with information including the complete title, author name(s), affiliation(s), and the corresponding author (name, postal and e-mail addresses, telephone/fax numbers) using the IEEE conference format via the conference website. Authors of accepted papers are invited to submit the completed versions to the special issue of Analog Integrated Circuits and Signal Processing – An International Journal.

For updated information, please visit

http://avic2018.eng.cmu.ac.th